This patch disables intercepting CR3 writes when nested paging is
enabled. For applications which cause excessive CR3 accesses, the
patch can increase their performance.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
eventinj_t eventinj;
int inst_len, rc;
+ if ( paging_mode_hap(v->domain) )
+ v->arch.hvm_vcpu.guest_cr[3] = v->arch.hvm_vcpu.hw_cr[3] = vmcb->cr3;
+
/*
* Before doing anything else, we need to sync up the VLAPIC's TPR with
* SVM's vTPR. It's OK if the guest doesn't touch CR8 (e.g. 32-bit Windows)
vmcb->g_pat = 0x0007040600070406ULL; /* guest PAT */
vmcb->h_cr3 = pagetable_get_paddr(v->domain->arch.phys_table);
- /*
- * No point in intercepting CR3 reads, because the hardware will return
- * the guest version anyway.
- */
- vmcb->cr_intercepts &= ~CR_INTERCEPT_CR3_READ;
+ /* No point in intercepting CR3 reads/writes. */
+ vmcb->cr_intercepts &= ~(CR_INTERCEPT_CR3_READ|CR_INTERCEPT_CR3_WRITE);
/*
* No point in intercepting INVLPG if we don't have shadow pagetables